The present invention relates to noise suppression generally and, more particularly, to power-supply configurable outputs for decreasing noise excursions on internal power busses for output drivers.
Switching output transistors at high speeds. can introduce noise on the output power supply nodes of an integrated circuit. Switching high currents can also introduce noise. Noise excursions on the internal output supply nodes degrade the performance of MOS output transistors during high speed and high current conditions.
One conventional method of reducing noise on the internal output supply nodes is to increase the number of dedicated supply pins. However, increasing the number of dedicated supply pins decreases the number of available data and control pins.
The present invention concerns an apparatus comprising one or more output circuits. The output circuits may be configured to configure a bond pad as either an input/output pad, a power pad, or a ground pad in response to a plurality of configuration inputs.
The objects, features and advantages of the present invention include providing a method and/or architecture that may (i) suppress excursions on an internal output power supply node, (ii) optimize performance by implementing power-supply-configurable outputs and I/Os and/or (iii) allow a user to reduce internal noise effects when operating in a high-speed and/or high-current system.